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DESIGN AND SIMULATION OF BUILDING BLOCKS OF A LOW-DROPOUT VOLTAGE REGULATOR

*Arief Wisnu Wardhana orcid  -  Departemen Teknik Elektro, Fakultas Teknik, Universitas Jenderal Soedirman, Jalan Mayjend. Sungkono, Blater, Kalimanah, Purbalingga 53371, Indonesia
Azis Wisnu Widhi Nugraha  -  Departemen Teknik Elektro, Fakultas Teknik, Universitas Jenderal Soedirman, Jalan Mayjend. Sungkono, Blater, Kalimanah, Purbalingga 53371, Indonesia
Eko Atmojo  -  Departemen Teknik Elektro, Fakultas Teknik, Universitas Jenderal Soedirman, Jalan Mayjend. Sungkono, Blater, Kalimanah, Purbalingga 53371, Indonesia
Ari Fadli  -  Departemen Teknik Elektro, Fakultas Teknik, Universitas Jenderal Soedirman, Jalan Mayjend. Sungkono, Blater, Kalimanah, Purbalingga 53371, Indonesia
Dikirim: 12 Nov 2021; Diterbitkan: 3 Peb 2022.
Akses Terbuka Copyright (c) 2022 Transmisi: Jurnal Ilmiah Teknik Elektro under http://creativecommons.org/licenses/by-sa/4.0.

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Regulator Low Dropout (LDO) adalah sebuah cara yang sederhana dan murah untuk mengatur sebuah tegangan keluaran yang diberi daya dari suatu masukan yang lebih tinggi tegangan nya. Regulator LDO adalah sebuah pengatur tegangan DC linear yang bisa meregulasi besarnya tegangan keluaran bahkan ketika tegangan suplai nya berubah turun menjadi sangat mendekati tegangan keluaran tersebut. Pada artikel penelitian ini, dijelaskan secara detail tentang cara untuk mendesain setiap blok penyusun suatu regulator tegangan drop-out rendah berbasis CMOS. Semua blok penyusun kemudian digabung untuk membentuk piranti LDO tersebut. Hasil desain kemudian disimulasikan menggunakan Multisim LIVE, yang merupakan sebuah simulator rangkaian online. Berbasis pada hasil simulasi, beberapa spesifikasi dari LDO yang sudah didesain kemudian diberikan. Spesifikasi tersebut diantara nya adalah besarnya tegangan dropout LDO, arus quiescent, besarnya regulasi beban, dan besarnya regulasi line.

 

Kata kunci: regulator tegangan, tegangan dropout, arus quiescent, regulasi beban, regulasi line

 

Low dropout regulators (LDOs) are a simple and inexpensive way to regulate an output voltage that is powered from a higher voltage input. An LDO regulator is a DC linear voltage regulator that can regulate the magnitude of the output voltage even when the supply voltage is very close to the output voltage. In this research paper, various building blocks of a CMOS-based low-dropout voltage regulator were designed and simulated using Multisim LIVE, an online circuit simulator. All of the building blocks were then combined to form the device. Based on the results of the simulation, several spesifications of the LDO were determined. Those are the LDO’s dropout voltage, its quiescent current, its load regulation, and its line regulation.

 

Keywords: voltage regulator, dropout voltage, quiescent current, load regulation, line regulation

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Kata Kunci: regulator tegangan, tegangan dropout, arus quiescent, regulasi beban, regulasi line

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